← Back to areas
SM - Stirling Middle
Debug mode
Berths
| Berth |
Descr |
| 6504 |
|
| 6507 |
|
| 6515 |
|
| 6516 |
|
| 6518 |
|
| 6519 |
|
| 6521 |
|
| 6522 |
|
| 6523 |
|
| 6524 |
|
| 6525 |
|
| 6526 |
|
| 6527 |
|
| 6528 |
|
| 6531 |
|
| 6533 |
|
| 6534 |
|
| 6535 |
|
| 6536 |
|
| 6537 |
|
| 6538 |
|
| 6541 |
|
| 6542 |
|
| 6543 |
|
| 6544 |
2N56
|
| 6546 |
|
| 6547 |
|
| 6548 |
|
| 6552 |
|
| 6553 |
|
| 6554 |
|
| 6558 |
|
| ADDP |
|
| APPU |
|
| ASUP |
|
| CS42 |
|
| L474 |
|
| LG02 |
|
| LSUP |
2P46
|
| N25F |
|
| N25R |
|
| P62T |
|
| P92T |
|
| SM01 |
1M03
|
| SM05 |
|
| SM09 |
|
| SM10 |
|
| SM11 |
|
| SM13 |
|
| SM14 |
|
| SM16 |
|
| SM87 |
|
| SM88 |
|
| SM89 |
|
| SN26 |
1L51
|
| SN27 |
|
| SN28 |
|
| SN42 |
|
| SN43 |
|
| SN46 |
|
| SN47 |
1T46
|
| SN48 |
|
| TAP1 |
|
Signalling
| Address |
Set |
Label |
| SM00:0 |
true |
|
| SM00:1 |
false |
|
| SM00:2 |
false |
|
| SM00:3 |
false |
|
| SM00:4 |
false |
|
| SM00:5 |
false |
|
| SM00:6 |
false |
|
| SM00:7 |
false |
|
| SM01:0 |
true |
|
| SM01:1 |
true |
|
| SM01:2 |
false |
|
| SM01:3 |
false |
|
| SM01:4 |
true |
|
| SM01:5 |
false |
|
| SM01:6 |
true |
|
| SM01:7 |
false |
|
| SM02:0 |
false |
|
| SM02:1 |
true |
|
| SM02:2 |
false |
|
| SM02:3 |
true |
|
| SM02:4 |
false |
|
| SM02:5 |
true |
|
| SM02:6 |
false |
|
| SM02:7 |
false |
|
| SM03:0 |
false |
|
| SM03:1 |
false |
|
| SM03:2 |
false |
|
| SM03:3 |
true |
|
| SM03:4 |
false |
|
| SM03:5 |
true |
|
| SM03:6 |
false |
|
| SM03:7 |
false |
|
| SM04:0 |
true |
|
| SM04:1 |
false |
|
| SM04:2 |
false |
|
| SM04:3 |
true |
|
| SM04:4 |
false |
|
| SM04:5 |
false |
|
| SM04:6 |
false |
|
| SM04:7 |
false |
|
| SM05:0 |
false |
|
| SM05:1 |
false |
|
| SM05:2 |
false |
|
| SM05:3 |
false |
|
| SM05:4 |
false |
|
| SM05:5 |
false |
|
| SM05:6 |
false |
|
| SM05:7 |
false |
|
| SM06:0 |
false |
|
| SM06:1 |
false |
|
| SM06:2 |
false |
|
| SM06:3 |
false |
|
| SM06:4 |
true |
|
| SM06:5 |
true |
|
| SM06:6 |
false |
|
| SM06:7 |
false |
|
| SM07:0 |
false |
|
| SM07:1 |
false |
|
| SM07:2 |
false |
|
| SM07:3 |
false |
|
| SM07:4 |
true |
|
| SM07:5 |
false |
|
| SM07:6 |
false |
|
| SM07:7 |
false |
|
| SM08:0 |
false |
|
| SM08:1 |
false |
|
| SM08:2 |
false |
|
| SM08:3 |
false |
|
| SM08:4 |
false |
|
| SM08:5 |
false |
|
| SM08:6 |
false |
|
| SM08:7 |
true |
|
| SM09:0 |
true |
|
| SM09:1 |
false |
|
| SM09:2 |
true |
|
| SM09:3 |
false |
|
| SM09:4 |
true |
|
| SM09:5 |
false |
|
| SM09:6 |
false |
|
| SM09:7 |
false |
|
| SM0A:0 |
true |
|
| SM0A:1 |
false |
|
| SM0A:2 |
false |
|
| SM0A:3 |
false |
|
| SM0A:4 |
false |
|
| SM0A:5 |
false |
|
| SM0A:6 |
false |
|
| SM0A:7 |
false |
|
| SM0B:0 |
false |
|
| SM0B:1 |
true |
|
| SM0B:2 |
false |
|
| SM0B:3 |
true |
|
| SM0B:4 |
false |
|
| SM0B:5 |
false |
|
| SM0B:6 |
true |
|
| SM0B:7 |
false |
|
| SM0C:0 |
false |
|
| SM0C:1 |
false |
|
| SM0C:2 |
false |
|
| SM0C:3 |
false |
|
| SM0C:4 |
false |
|
| SM0C:5 |
false |
|
| SM0C:6 |
false |
|
| SM0C:7 |
false |
|
| SM0D:0 |
false |
|
| SM0D:1 |
false |
|
| SM0D:2 |
false |
|
| SM0D:3 |
true |
|
| SM0D:4 |
true |
|
| SM0D:5 |
false |
|
| SM0D:6 |
true |
|
| SM0D:7 |
true |
|
| SM0E:0 |
false |
|
| SM0E:1 |
false |
|
| SM0E:2 |
false |
|
| SM0E:3 |
false |
|
| SM0E:4 |
false |
|
| SM0E:5 |
false |
|
| SM0E:6 |
false |
|
| SM0E:7 |
false |
|
| SM10:0 |
false |
|
| SM10:1 |
false |
|
| SM10:2 |
true |
|
| SM10:3 |
true |
|
| SM10:4 |
false |
|
| SM10:5 |
false |
|
| SM10:6 |
false |
|
| SM10:7 |
false |
|
| SM11:0 |
false |
|
| SM11:1 |
true |
|
| SM11:2 |
true |
|
| SM11:3 |
true |
|
| SM11:4 |
true |
|
| SM11:5 |
false |
|
| SM11:6 |
true |
|
| SM11:7 |
true |
|
| SM12:0 |
false |
|
| SM12:1 |
true |
|
| SM12:2 |
true |
|
| SM12:3 |
false |
|
| SM12:4 |
false |
|
| SM12:5 |
false |
|
| SM12:6 |
false |
|
| SM12:7 |
false |
|